From the Institute of Computing Technology division of the Chinese Academy of Sciences and Peng Cheng Laboratory comes a high-performance and well-documented RISC-V core called XiangShan.
The NXP EdgeLock A30, smaller than a grain of rice, protects digital data from tampering, aiding future EU digital product passport requirements.
There’s a single-core variant and one that packs a RISC-V core in place of the Tensilica ... in quite a few projects. Espressif’s block diagram for the chip. Sadly the data sheet does not ...
The L50(F) is a medium-sized, efficient 32-bit embedded RISC-V processor aimed at embedded systems with mid-range processing requirements. The core has a 5-stage pipeline. The L50F has a floating ...